Granularity Bracket — FEMU between block & superblock GC
Our finding. The gap between the simulator and FEMU is explained by exactly one
mechanism: garbage-collection erase granularity. Running the same workload with block- and
superblock-granular GC brackets FEMU's value — on prxy_0,
1.54 (block) ≤ 1.873 (FEMU) ≤ 2.14 (superblock). The ~40% swing from the
granularity switch contains FEMU's number.
How this helps our work. It turns an apparent discrepancy into a controlled, understood modeling parameter. We can read every sim–FEMU comparison correctly, and tune the simulator to a target device's erase granularity for an exact match — important because real NAND erases at superblock granularity for parallelism.
What it shows. The same conventional workload three ways: EyanaSSDSim block GC, FEMU (superblock erase), EyanaSSDSim superblock GC. Coarser erase reclaims a whole line together, migrating more valid pages → higher WAF; block reclaim can take the single emptiest block → fewer migrations → lower WAF.
- prxy_0 (high-GC real trace): block 1.54 ≤ FEMU 1.87 ≤ superblock 2.14 — FEMU is bracketed, and the ~40% block→superblock swing contains FEMU's value, so granularity accounts for the sim–FEMU gap.
- Across four workloads (OP 25%): prxy_0 1.54/1.87/2.14, uniform 1.56/1.46/1.78, 80/20 1.15/1.13/1.19, sequential 1.00/1.00/1.00 (block/FEMU/superblock). The clean bracket holds where GC is heavy (prxy_0); on the low-WAF synthetic loads the three collapse to within a few percent and the GC-trigger threshold dominates.
- Invariant: the sim's superblock mode always exceeds FEMU (+5% to +22%) — its per-plane (incoherent) line allocation migrates more than FEMU's line-coherent superblock.
- Superblock GC also raises wear concentration (DoEC 10.6 → 20.2 on prxy_0), the endurance cost of coarse-grained erase.
